SKY130 Artefacts

04.09.2024, 10:20:07

ADC Comparator

Comparator for 8-bit ADC.

cmp


🔗 Schematics

SPECIFICATIONS

Tranisent Specification

Parameter Min (Spec. / Sim.) Max (Sim. / Spec.) Unit Checks (total/pass/fail/NaN) Comment
Rising Output Delay 50.0 / 94.4865 840.0953 / 900.0 ns 225/100.0%/0.0%/0.0% Positive threshold cross to output high delay
Max. supply current 300.0 / 370.0463 712.3121 / 600.0 uA 225/71.5556%/28.4444%/0.0% Maximum supply current for output switch
Mean supply current 50.0 / 62.1762 125.3619 / 150.0 uA 225/100.0%/0.0%/0.0% Mean supply current
Show specification violation details...

FAIL: Specification violation for parameter "Max. supply current":
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:0 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:1 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:2 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:3 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:4 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:5 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:6 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:7 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:8 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:9 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:10 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:11 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:12 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:13 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:14 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:17 vin_p_diff:0.001 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:18 vin_p_diff:0.01 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:19 vin_p_diff:0.005 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:20 vin_p_diff:0.001 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:21 vin_p_diff:0.01 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:22 vin_p_diff:0.005 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:23 vin_p_diff:0.001 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:24 vin_p_diff:0.01 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:25 vin_p_diff:0.005 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ff/cmp_tran_speed_rising.csv Index:26 vin_p_diff:0.001 temp:20.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp/batch_0/hh/cmp_tran_speed_rising.csv Index:0 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp/batch_0/hh/cmp_tran_speed_rising.csv Index:1 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp/batch_0/hh/cmp_tran_speed_rising.csv Index:2 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp/batch_0/hh/cmp_tran_speed_rising.csv Index:3 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp/batch_0/hh/cmp_tran_speed_rising.csv Index:4 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp/batch_0/hh/cmp_tran_speed_rising.csv Index:5 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp/batch_0/hh/cmp_tran_speed_rising.csv Index:6 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp/batch_0/hh/cmp_tran_speed_rising.csv Index:7 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp/batch_0/hh/cmp_tran_speed_rising.csv Index:8 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp/batch_0/hh/cmp_tran_speed_rising.csv Index:9 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp/batch_0/hh/cmp_tran_speed_rising.csv Index:10 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp/batch_0/hh/cmp_tran_speed_rising.csv Index:11 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp/batch_0/hh/cmp_tran_speed_rising.csv Index:14 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp/batch_0/tt/cmp_tran_speed_rising.csv Index:0 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp/batch_0/tt/cmp_tran_speed_rising.csv Index:1 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp/batch_0/tt/cmp_tran_speed_rising.csv Index:2 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp/batch_0/tt/cmp_tran_speed_rising.csv Index:3 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp/batch_0/tt/cmp_tran_speed_rising.csv Index:4 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp/batch_0/tt/cmp_tran_speed_rising.csv Index:5 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp/batch_0/tt/cmp_tran_speed_rising.csv Index:6 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp/batch_0/tt/cmp_tran_speed_rising.csv Index:7 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp/batch_0/tt/cmp_tran_speed_rising.csv Index:8 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp/batch_0/tt/cmp_tran_speed_rising.csv Index:9 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp/batch_0/tt/cmp_tran_speed_rising.csv Index:10 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp/batch_0/tt/cmp_tran_speed_rising.csv Index:11 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp/batch_0/tt/cmp_tran_speed_rising.csv Index:14 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ll/cmp_tran_speed_rising.csv Index:0 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ll/cmp_tran_speed_rising.csv Index:1 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ll/cmp_tran_speed_rising.csv Index:2 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ll/cmp_tran_speed_rising.csv Index:3 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ll/cmp_tran_speed_rising.csv Index:4 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ll/cmp_tran_speed_rising.csv Index:5 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ll/cmp_tran_speed_rising.csv Index:6 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ll/cmp_tran_speed_rising.csv Index:7 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ll/cmp_tran_speed_rising.csv Index:8 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ll/cmp_tran_speed_rising.csv Index:9 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ll/cmp_tran_speed_rising.csv Index:10 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ll/cmp_tran_speed_rising.csv Index:11 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp/batch_0/ll/cmp_tran_speed_rising.csv Index:14 vin_p_diff:0.001 temp:-40.0 v_sup:5.0


Tranisent Specification [PEX]

Parameter Min (Spec. / Sim.) Max (Sim. / Spec.) Unit Checks (total/pass/fail/NaN) Comment
Rising Output Delay 50.0 / 110.1512 975.1655 / 900.0 ns 225/96.4444%/3.5556%/0.0% Positive threshold cross to output high delay
Max. supply current 300.0 / 370.16 714.0105 / 600.0 uA 225/71.1111%/28.8889%/0.0% Maximum supply current for output switch
Mean supply current 50.0 / 62.3379 127.6955 / 150.0 uA 225/100.0%/0.0%/0.0% Mean supply current
Show specification violation details...

FAIL: Specification violation for parameter "Rising Output Delay":
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/hh/cmp_tran_speed_rising.csv Index:32 vin_p_diff:0.001 temp:140.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/hh/cmp_tran_speed_rising.csv Index:44 vin_p_diff:0.001 temp:140.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/tt/cmp_tran_speed_rising.csv Index:32 vin_p_diff:0.001 temp:140.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/tt/cmp_tran_speed_rising.csv Index:44 vin_p_diff:0.001 temp:140.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ll/cmp_tran_speed_rising.csv Index:32 vin_p_diff:0.001 temp:140.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ll/cmp_tran_speed_rising.csv Index:44 vin_p_diff:0.001 temp:140.0 v_sup:5.0
FAIL: group:ss file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ss/cmp_tran_speed_rising.csv Index:32 vin_p_diff:0.001 temp:140.0 v_sup:5.0
FAIL: group:ss file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ss/cmp_tran_speed_rising.csv Index:44 vin_p_diff:0.001 temp:140.0 v_sup:5.0

FAIL: Specification violation for parameter "Max. supply current":
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:0 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:1 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:2 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:3 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:4 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:5 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:6 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:7 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:8 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:9 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:10 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:11 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:12 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:13 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:14 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:16 vin_p_diff:0.005 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:17 vin_p_diff:0.001 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:18 vin_p_diff:0.01 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:19 vin_p_diff:0.005 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:20 vin_p_diff:0.001 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:21 vin_p_diff:0.01 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:22 vin_p_diff:0.005 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:23 vin_p_diff:0.001 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:24 vin_p_diff:0.01 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:25 vin_p_diff:0.005 temp:20.0 v_sup:5.0
FAIL: group:ff file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ff/cmp_tran_speed_rising.csv Index:26 vin_p_diff:0.001 temp:20.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/hh/cmp_tran_speed_rising.csv Index:0 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/hh/cmp_tran_speed_rising.csv Index:1 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/hh/cmp_tran_speed_rising.csv Index:2 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/hh/cmp_tran_speed_rising.csv Index:3 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/hh/cmp_tran_speed_rising.csv Index:4 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/hh/cmp_tran_speed_rising.csv Index:5 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/hh/cmp_tran_speed_rising.csv Index:6 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/hh/cmp_tran_speed_rising.csv Index:7 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/hh/cmp_tran_speed_rising.csv Index:8 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/hh/cmp_tran_speed_rising.csv Index:9 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/hh/cmp_tran_speed_rising.csv Index:10 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/hh/cmp_tran_speed_rising.csv Index:11 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:hh file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/hh/cmp_tran_speed_rising.csv Index:14 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/tt/cmp_tran_speed_rising.csv Index:0 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/tt/cmp_tran_speed_rising.csv Index:1 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/tt/cmp_tran_speed_rising.csv Index:2 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/tt/cmp_tran_speed_rising.csv Index:3 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/tt/cmp_tran_speed_rising.csv Index:4 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/tt/cmp_tran_speed_rising.csv Index:5 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/tt/cmp_tran_speed_rising.csv Index:6 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/tt/cmp_tran_speed_rising.csv Index:7 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/tt/cmp_tran_speed_rising.csv Index:8 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/tt/cmp_tran_speed_rising.csv Index:9 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/tt/cmp_tran_speed_rising.csv Index:10 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/tt/cmp_tran_speed_rising.csv Index:11 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:tt file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/tt/cmp_tran_speed_rising.csv Index:14 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ll/cmp_tran_speed_rising.csv Index:0 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ll/cmp_tran_speed_rising.csv Index:1 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ll/cmp_tran_speed_rising.csv Index:2 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ll/cmp_tran_speed_rising.csv Index:3 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ll/cmp_tran_speed_rising.csv Index:4 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ll/cmp_tran_speed_rising.csv Index:5 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ll/cmp_tran_speed_rising.csv Index:6 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ll/cmp_tran_speed_rising.csv Index:7 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ll/cmp_tran_speed_rising.csv Index:8 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ll/cmp_tran_speed_rising.csv Index:9 vin_p_diff:0.01 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ll/cmp_tran_speed_rising.csv Index:10 vin_p_diff:0.005 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ll/cmp_tran_speed_rising.csv Index:11 vin_p_diff:0.001 temp:-40.0 v_sup:5.0
FAIL: group:ll file:work/sim/cmp/cmp_tb.1_cmp_ext/batch_0/ll/cmp_tran_speed_rising.csv Index:14 vin_p_diff:0.001 temp:-40.0 v_sup:5.0


PERFORMANCE CHARACTERISTICS

Transient Performance

xyplot_timev(vcmp)group_('tt',-2),('ff',-2),('ss',-2),('ll',-2),('hh',_-2)__41e4a1572255492512a667915a794a74
Threshold cross at 1us.

xyplot_timev(vcmp)v(indiff)('tt',-2)__41e4a1572255492512a667915a794a74
Threshold cross at 1us.

xyplot_timev(vcmp)v(vinn)('tt',-2)__41e4a1572255492512a667915a794a74
Threshold cross at 1us.

Transient Performance [PEX]

xyplot_timev(vcmp)group_('tt',-2),('ff',-2),('ss',-2),('ll',-2),('hh',_-2)__996af76ec5d4319edfb27b3ec73de806
Threshold cross at 1us.

xyplot_timev(vcmp)v(indiff)('tt',-2)__996af76ec5d4319edfb27b3ec73de806
Threshold cross at 1us.

xyplot_timev(vcmp)v(vinn)('tt',-2)__996af76ec5d4319edfb27b3ec73de806
Threshold cross at 1us.